4-119 telcom semiconductor, inc. 7 6 5 4 3 1 2 8 tc170 cmos current mode pwm controller features n low supply current with cmos technology ................................. 3.8ma max n internal reference ............................................. 5.1v n fast rise/fall times (c l = 1000pf) ............. 50nsec n dual push-pull outputs n direct-power mosfet drive n high totem-pole output drive .................... 300ma n differential current-sense amplifier n programmable current limit n soft-start operation n double-pulse suppression n undervoltage lockout n wide supply voltage operation ............... 8v to16v n high frequency operation .......................... 200khz n available with low off state outputs n low power, pin-compatible replacement for uc3846 ordering information temperature part no. package range TC170COE 16-pin soic (wide) 0 c to +70 c tc170cpe 16-pin plastic dip (narrow) 0 c to +70 c general description the tc170 brings low-power cmos technology to the current-mode-switching power supply controller market. maximum supply current is 3.8 ma. bipolar current-mode control integrated circuits require five times more operating current. the dual totem-pole cmos outputs drive power mosfets or bipolar transistors. the 50nsec typical output rise and fall times (1000pf capacitive loads) minimize mosfet power dissipation. output peak current is 300ma. the tc170 contains a full array of system-protection circuits (see features). current-mode control lets users parallel power supply modules. two or more tc170 controllers can be slaved together for parallel operation. circuits can operate from a master tc170 internal oscillator or an external system oscillator. the tc170 operates from an 8v to 16v power supply. an internal 2%, 5.1v reference minimizes external compo- nent count. the tc170 is pin compatible with the unitrode uc1846/2846/3846 bipolar controller. other advantages inherent in current-mode control in- clude superior line and load regulation and automatic sym- metry correction in push-pull converters. + 5.1-volt reference oscillator 3.15 current amplifier pwm comparator positive feedback 15 9 10 3 4 7 5 8 6 v in sync (? current sense input (+) current sense input comp (+) error amp input (? error amp input error amplifier 100? 0.75v limit buffer amplifier q4 350mv lock-up amplifier q3 q1 q2 3.5k w shutdown comparator 350 mv 6k w shutdown current limit/ soft-start adjust note: outputs low in off state. 16 1 s s r q c dq q ground v dd output a ( ) 12 14 11 13 pwm latch tc170 v ref 2 + r o c o v dd + + + + + undervoltage lockout output b ( ) tc170-5 10/1/96 functional block diagram
4-120 telcom semiconductor, inc. electrical characteristics: v in = 16v, r o = 24k w , c o = 1 nf, t a = 25 c, unless otherwise indicated. symbol parameter test conditions min typ max unit reference voltage v ref output voltage i out = 1ma 5 5.1 5.3 v line regulation v in = 8v to 16v 5 15 mv load regulation i out = 1ma to 10ma 13 20 mv v rtc temperature coefficient over operating temperature range 0.4 0.5 mv/ c oscillator oscillator frequency 35 42 46 khz voltage stability v in = 8v to 16v 1.1 1.5 %/v temperature stability over operating temperature range 5 10 % error amplifier v os input offset voltage 6 30 mv i b input bias current 6 1na v cmrr common-mode input voltage v in = 8v to 16v 0 v dd C 2v v a vol open-loop voltage gain v out = 1v to 6v 70 db bw unity gain bandwidth 1.2 mhz cmrr common-mode rejection ratio v cmv 0v to 14v 60 db psrr power supply rejection ratio v in = 8v to 16v 60 db current sense amplifier amplifier gain pin 3 = 0v to 1.1v 3 3.15 3.3 v/v maximum differential input signal v pin4 C v pin3 1.1 v common-mode input voltage 0 v dd C 3v v current limit adjust current limit offset voltage 0.5 1 v i b input bias current 1na shutdown terminal v tb threshold voltage 0.3 0.35 0.4 v v in input voltage range 0 v dd v minimum latching current at pin 1 125 m a maximum nonlatching current at pin 1 50 m a output stage v dd output voltage pin 13 v in C 0. 5 v in v in + 0.5 v v ol output low level i sink = 20ma 0.4 v v ol output low level i sink = 100ma 2 v absolute maximum ratings* supply voltage ............................................................18v output voltage ................................................ v dd or 18v analog inputs ..................................... C 0.3v to v s + 0.3v storage temperature range ................ C 65 c to +150 c lead temperature (soldering, 10 sec) ................. +300 c maximum chip temperature ................................... 150 c plastic package thermal resistance: q ja (junction to ambient) ............................. 140 c/w q jc (junction to case) ................................... 70 c/w cmos current mode pwm controller tc170 operating temperature range commercial ........................................... 0 c to +70 c *static-sensitive device. unused devices must be stored in conductive material. protect devices from static discharge and static fields. stresses above those listed under absolute maximum ratings may cause perma- nent damage to the device. these are stress ratings only and functional operation of the device at these or any other conditions above those indicated in the operational sections of the specifications is not implied. exposure to absolute maximum rating conditions for extended periods may affect device reliability.
4-121 telcom semiconductor, inc. 7 6 5 4 3 1 2 8 electrical characteristics (cont.): v in = 16v, r o = 24k w , c o = 1nf, t a = 25 c, unless otherwise indicated. symbol parameter test conditions min typ max unit output stage (cont.) v oh output high level i source = 20ma v dd C 1v v v ol output high level i source = 100ma v dd C 4v v t r output rise time c l = 1000pf 50 150 nsec t f output fall time c l = 1000pf 50 150 nsec undervoltage lockout start-up threshold 7.15 7.7 8.25 v threshold hysteresis 0.5 0.75 1 v supply i s standby supply current 2.7 3.8 ma pin no. (16-pin pdip) symbol description 1 soft start/i lim soft start adjust / current limit. for setting the peak current threshold of sense inputs (pins 3 and 4). second function of this pin is soft-start adjust. 2v ref out reference supply output of 5.1 volts. it can supply a minimum of 10ma. 3C i sense in C current sense input. inverting input for sensing peak current of the pass transistor through series sense current monitor resistor. 4+ i sense in + current sense input. non-inverting input used in conjunction with pin 3. this senses the positive end of current monitor resistor. 5 + error amp in + error amp in. non-inverting input for output voltage regulation. 6 C error amp in C error amp in. inverting input of the amplifier for the reference voltage. 7 cmptr for compensation of the feedback loop response. 8c o timing capacitor (c o) input to set oscillator frequency in conjunction with pin 9, r o , resistor input. second function is for setting crossover dead time of pin 11and 14 outputs. 9r o timing resistor (r o) input to set oscillator frequency by setting constant current charge rate to charge capacitor c o . 10 sync for pwm controller oscillator synchronization of two or more controllers. or as a clock input to sync oscillator from external signal. 11 output a a output drive of phase a from push pull transistors. 12 gnd ground return for all input and output pins. 13 v dd supplies power to operate the output drivers only. 14 output b output of phase b from push pull transistors. 15 v in voltage bias supply for all tc170 circuits except the output transistors. 16 shutdown input pin to disable both output drives to 0v off. pin configurations (dip and soic) tc170 cpe shdn v dd soft start/ i lim output b v ref ?i sense in + i sense in + error amp in cmptr gnd output a sync r o out ?error amp in note: outputs low in "off" state. v in c o 1 2 3 4 16 15 14 13 5 6 7 12 11 10 9 8 acom 1 2 3 4 15 16 14 13 5 6 7 12 11 10 9 8 TC170COE buf v ss c int + v ref c ref c ref c az cmptr out a digital gnd b v dd + + v in v in v ref cmos current mode pwm controller tc170 pin description
4-122 telcom semiconductor, inc. cmos current mode pwm controller tc170 peak current limit setup resistors r1 and r2 at the current limit input (pin 1) set the tc170 peak current limit (figure 1). the potential at pin 1 is easily calculated: v1 = v ref r2 r1 + r2 r1 should be selected first. the shutdown circuit fea- ture is not latched for (v ref C 0.35)/r1 < 50 m a and is latched for currents greater than 125 m a. the error amplifier output voltage is clamped from going above v1 through the limit buffer amplifier. peak current is sensed by rs and amplified by the current amplifier which has a fixed gain of 3.15. i pcl , the peak current limit, is the current that causes the pwm comparator noninverting input to exceed v1, the potential at the inverting input. once the comparator trip point is exceeded, both outputs are disabled. i pcl is easily calculated: i pcl = v1 C 0.75v 3.15 (rs) where: v1 = v ref v ref = internal voltage reference = 5.1v 3.15 = gain of current-sense amplifier 0.75v = current limit offset both driver outputs (pins 11 and 14) are off (low) when the peak current limit is exceeded. when the sensed current goes below i pcl , the circuit operates normally. output shutdown the tc170 outputs can be turned off quickly through the shutdown input (pin 16). a signal greater than 350 mv at pin 16 forces the shutdown comparator output high. the pwm latch is held set, disabling the outputs. q2 is also turned on. if v ref /r1 is greater than 125 m a, positive feedback through the lock-up amplifier and q1 keeps the inverting pwm comparator inverting input below 0.75v. q3 remains on even after the shutdown input signal is removed, because of the positive feedback. the state can be cleared only through a power-up cycle. out- puts will be disabled whenever the potential at pin 1 is below 0.75v. the shutdown terminal gives a fast, direct way to dis- able the tc170 output transistors. system protection and remote shutdown applications are possible. r2 r1 + r2 the input pulse to pin 16 should be at least 500 nsec wide and have an amplitude of at least 1v in order to get the minimum propagation delay from input to output. if these parameters are met, the delay should be less than 600nsec at 25 c; however, the delay time will increase as the device temperature rises. soft restart from shutdown a soft restart can be programmed if nonlatched shut- down operation is used. a capacitor at pin 1 will cause a gradual increase in potential toward v1. when the voltage at pin 1 reaches 0.75v, the pwm latch set input is removed and the circuit establishes a regulated output voltage. the soft-start opera- tion forces the pwm output drivers to initially operate with minimum duty cycle and low peak currents. even if a soft start is not required, it is necessary to insert a capacitor between pin 1 and ground if the current i l is greater than 125 m a. this capacitor will prevent "noise triggering" of the latch, yet minimize the soft-start effect. soft-start power-up during power-up, a capacitor at r1, r2 initiates a soft- start cycle. as the input voltage (pin 15) exceeds the undervoltage lockout potential (7.7v), q4 is turned off, ending undervoltage lockout. whenever the pwm com- parator inverting input is below 0.5v, both outputs are disabled. when the undervoltage lockout level is passed, the capacitor begins to charge. the pwm duty cycle increases until the operating output voltage is reached. soft-start operation forces the pwm output drivers to initially operate with minimum duty cycle and low peak current. current-sense amplifier the current-sense amplifier operates at a fixed gain of 3.15. maximum differential input voltage (v pin4 C v pin3 ) is 1.1v. common-mode input voltage range is 0v to v in C 3v. resistive-sensing methods are shown in figure 2. in figure 2(a), a simple rc filter limits transient voltage spikes at pin 4, caused by external output transistor-collector capacitance. transformer coupling (figure 3) offers isola- tion and better power efficiency, but cost and complexity increase. in order to minimize the propagation delay from the input to the current amplifier to the output terminals, the current ramp should be in the order of 1 m s in width (min). typical time delay values are in the 300 to 400nsec region at 25 c. the delay time increases with device temperature so that at 50 c, the delay times may be increased by as much as 100nsec.
4-123 telcom semiconductor, inc. 7 6 5 4 3 1 2 8 cmos current mode pwm controller tc170 4 3 3.15 current- sense amplifier c r* (a) ground reference *optional rc filter i i 4 3 tc170 v out rs ( b ) above-ground resistive sensin g tc170 rs 3.15 current- sense amplifier + + figure 1. r1 and r2 set maximum peak output current figure 2. resistive sensing tc170 switch current 3.15 current-sense 0.75v + 4 3 7 5 6 v dd 100 a m v1 error amplifier positive feedback q2 350mv q3 shutdown comparator 350mv 6k q4 from undervoltage lockout 10 pwm latch s s r q lock-up amplifier i l 3.5k q1 pwm comparator "a" = 1 output off (low) v ref 5.1v 2 v1 r2 16 limit buffer amplifier rs r1 amplifier 1 + + + + + +
4-124 telcom semiconductor, inc. cmos current mode pwm controller tc170 4 3 3.15 current sense amplifier tc170 v s n 1 i s v s = i s ?rs n + + figure 5. external clock synchronization figure 4. master/slave parallel operation figure 3 transformer isolated current sense undervoltage lockout the undervoltage lockout circuit forces the tc170 out- puts off (low) if the supply voltage is below 7.7v. threshold hysteresis is 0.75v and guarantees clean, jitter-free turn-on and turn-off points. the hysteresis also reduces capacitive filtering requirements at the pwm controller supply input (pin 15). circuit synchronization current-mode-controlled power supplies can be oper- ated in parallel with a common load. paralleled converters will equally share the load current. voltage-mode control- lers unequally share the load current, decreasing system reliability. two or more tc170 controllers can be slaved to- gether for parallel operation. circuits can operate from a master tc170 internal oscillator with an external driver (figure 4). devices can also be slaved to an external oscillator (figure 5). disable internal slave device oscilla- tors by grounding pin 8. slave controllers derive an oscilla- tor from the bidirectional synchronization output signal at pin 10. pin 10 is bidirectional in that it is intended to be both a sync output and input. this is accomplished by making the output driver "weak." this is advantageous in that it elimi- nates an additional pin from the package but does not enable the device to directly drive another device. in order to make it an effective driver, a buffer is required (figure 4). in order to use pin 10 as a sync input, it is necessary to overcome the internal driver. this requires a pulse with an amplitude equal to v in . since v in must be above 8.25v for the undervoltage lockout to be disabled, a cmos or open- collector ttl driver should be used. master r o sync cmptr slave 9 8 9 8 210 7 7 1/2 tc4427 v dd tc170 10 c o v ref c o r o cmptr sync tc170 1/2 tc4427 tc170 tc170 sync sync external* oscillator c o 29 29 10 15 15 8 10 v s + v dd *pulse width of oscillator is = t d c o v ref r o r o v ref v in v in
4-125 telcom semiconductor, inc. 7 6 5 4 3 1 2 8 cmos current mode pwm controller tc170 figure 6 . oscillator circuit figure 7. oscillator frequency vs oscillator resistance where: r o = oscillator resistor (k w ) c o = oscillator capacitor (pf) t d = output dead time (sec) maximum possible duty cycle is set by the dead time. 50 45 40 35 30 25 20 15 10 5 0 20 40 60 80 100 120 140 160 180 200 t a = +25? 250pf 500pf oscillator resistance (k w ) oscillator frequency (khz) 750pf 1000pf 2.3v 4.3v i charge 2.3v r o 8 c o 9 1 ma discharge current sync 10 v dd 2.3v pin 8 pin 10 1 on-time output dead time (t d ) + r o f o t d = oscillator frequency and output dead time the oscillator frequency for r o = 24k w and c o = 1000pf is: C where: r o = oscillator resistor ( w ) c o = oscillator capacitor (f) f o = oscillator frequency (hz) the oscillator resistor can range from 5 k w to 50 k w . oscillator capacitor can range from 250 pf to 1000 pf. figure 7 shows typical operation for various resistance and capacitance values. during transitions between the two outputs, simulta- neous conduction is prevented. oscillator fall time controls the output off, or dead time (figure 6). dead time is approximately: ] [ f o = 1.27 2800 c o r o c o r o 2 c o c o + 150 10 C12 2000 [c o ] 1 C ( ) 2.3 r o
4-126 telcom semiconductor, inc. cmos current mode pwm controller tc170 typical characteristics t a = +25 c c load = 500pf v s = 16v output rise and fall times output rise and fall times output rise and fall times 5v div 50nsec div 5v div 5 nsec div t a = +25 c c load = 1800pf v s = 16v t a = +25 c c load = 1000pf v s = 16v 5v div 50nsec div
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